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You are here: Home / Featured article / Deep-­Learning And Numerical Optimization

Deep-­Learning And Numerical Optimization

October 13, 2014 by Rob Farber Leave a Comment

The massively parallel mapping and code described in this chapter is generic and can be applied to a broad spectrum of numerical optimization and machine-learning algorithms ranging from neural networks to support vector machines to expectation maximization and independent components analysis. Many of these techniques are heavily used in lucrative data-mining and social media workflows as well as real-time robotics, computer vision, signal processing and augmented reality applications.

The code in this chapter (the farbopt teaching code) demonstrates that it is possible to exceed a TF/s of average sustained performance on a single Intel Xeon Phi coprocessor (KNC) using only user-written C-code (no optimized libraries needed). The MPI version described In this chapter can run with near-linear scalability and petascale performance on the current generation of leadership class supercomputers. It is expected this same mapping is exascale capable, an assertion that can be tested when such a machine is built. Both high performance and large memory make the Intel Xeon Phi coprocessor family an ideal platform for training on the large data sets that are required to solve complex and high-dimensional pattern recognition problems. However, the goodness does not stop with Intel Xeon Phi coprocessors as the optimized models produced by the code in this chapter can be used on ultra-low-power and small memory-footprint devices such as CPUs, DSPs, FPGA, and ASICs to perform a variety of real-time and robotic tasks.

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Chapter Author

Robert Farber

Robert Farber

Rob is a recognized global technology leader (US, Europe, Middle East, Asia‐Pacific) who is highly‐rated, highly visible, and in-­demand as a technology/scientific adviser, teacher, and collaborator. Throughout his career he has demonstrated a strong creative ability while acting as an author, senior scientist, principal investigator, corporate leader, technical architect, and media consultant. Rob’s companies have contracts with fortune 100 companies (Intel, NVIDIA, AMD, and others), research organizations (DARPA, ONR, Cold Spring Harbor and others) plus numerous small companies. Co-­founder of a computational drug discovery and computer manufacturing company that achieved liquidity events. Rob also has an extensive background in research (the theoretical division at Los Alamos, external faculty at the Santa Fe In research (the theoretical division at Los Alamos, external faculty at the Santa Fe Institute, NERSC in Berkeley and PNNL in Washington State). 

Click to see the overview article “Teaching The World About Intel Xeon Phi” that contains a list of TechEnablement links about why each chapter is considered a “Parallelism Pearl” plus information about James Reinders and Jim Jeffers, the editors of High Performance Parallelism Pearls.

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Filed Under: Featured article, Featured news, News, News, Xeon Phi Tagged With: HPC, Intel, Intel Xeon Phi, x86

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