StreamComputing launched an educational initiative this week that aims to get more developers to study and use OpenCL in their projects. Within this project, up to 20 collaborators will port as many GEGL operations to OpenCL as possible. There is tons of work to be done, but the benefit is that your code will be running in GIMP. Vincent Hindriksen and Adel Johar … [Read more...]
Intel tutorial shows how to view OpenCL assembly code
In order to better optimize and debug OpenCL kernels, sometimes it is very helpful to look at the underlying assembly. This article shows you the tools available in the Intel® SDK for OpenCL™ Applications that allow you to view assembly generated by the offline compiler for individual kernels, highlight the regions of the assembly code that correspond to OpenCL C code, as well … [Read more...]
No longer a preview – Intel updates the INDE OpenCL Code Analyzer
Intel has updated the new OpenCL™ Code Analyzer, a feature of Intel® INDE OpenCL™ Code Builder, which adds performance analysis capabilities integrated into a Microsoft Visual Studio OpenCL development environment. No longer a preview, the OpenCL Code Builder now supports OpenCL code development, which enables developers to carry on performance optimizations in each step of … [Read more...]
Provisional OpenCL 2.1 Enables Kernels Written Using a Subset of C++14 and Uses SPIR-V
The Khronos™ Group today announced the ratification and public release of the OpenCL™ 2.1 provisional specification viewable at www.khronos.org/opencl/ so developers and implementers can provide feedback before finalization at the OpenCL forums. Comments can be made via https://www.khronos.org/opencl/opencl_feedback_forum. The OpenCL 2.1 C++ kernel language is a static … [Read more...]
OpenCL SPIR Tutorial Teaches Portability Without Shipping Kernel Source
Intel has released an OpenCL tutorial showing how developers can use SPIR (Standard Portable Intermediate Representation) to preserve vendor and device portability without having to ship OpenCL kernel source code. For more information about how SPIR enables commercial OpenCl applications, see our article, "Commercial OpenCL! SPIR 2.0 Protects IP Yet Allows Powerful, Portable, … [Read more...]
OpenCL Programmed FPGAs Claim a 3X Performance-to-Power Advantage at Microsoft
The Microsoft white paper, "Accelerating Deep Convolutional Neural Networks Using Specialized Hardware" describes an OpenCL programmed implementation of Convolutional Neural Networks (CNNs) that touts a conservative estimate of 3x the performance-to-power advantage over NVIDIA GPUs when running on new FPGA hardware. Doug Berger posted on the Inside Microsoft Research … [Read more...]
Tutorial on the OpenCL 2.0 Generic Address Space
Adam Lake and Robert Ioffe posted a nice tutorial on the Intel website about the new OpenCL 2.0 generic address space. The OpenCL 2.0 generic address space makes writing OpenCL programs easier by removing the requirement of decorating all pointers with a points to address space. Instead, OpenCL programmers just use pointers as they would in standard C. Utilizing this new … [Read more...]
Intel Posts OpenCL 2.0 QuickSort Tutorial (Compare to TE CUDA Version)
Intel Engineer Robert Ioffe has posted an OpenCL QuickSort tutorial that utilizes nested parallelism and Workgroup-scan functions. In particular, the tutorial shows how to use the OpenCL™ 2.0 enqueue_kernel functions that queue kernels from the device without host intervention (Much like dynamic parallelism) plus work_group_scan_exclusive_add and … [Read more...]
Attend or Submit to the 3rd IWOCL May 12-13, 2015 at Stanford University
The 3rd IWOCL (International Workshop on OpenCL) takes place at Stanford University, California from Tuesday 12 to Wednesday 13 May 2015. Workshops are held on the Tuesday, followed by the one-day conference on Wednesday. The conference is accompanied by a poster session and table-top displays by sponsors. OpenCL Papers, Workshops and Posters The IWOCL 2015 call for … [Read more...]
Implications of OS Jitter on Real-Time Applications for FPGAs, GPUs, and Intel
FPGAs, GPUs, and Intel Xeon Phi coprocessors can all offer superb performance at low watt/flop and high flop/dollar ratios for real-time computing. To promote real-time FPGA development, several Altera Engineers (Chee Nouk Phoon,Chei Siang Ng, Steve Jahnke, plus Findlay Shearer, Linux Marketing Manager) examined the impact of operating system jitter on real-time performance in … [Read more...]