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You are here: Home / Archives for Rob Farber

Power Analysis on the Intel Xeon Phi Coprocessor

October 22, 2014 by Rob Farber Leave a Comment

Power has become the limiting factor today on how far we can scale an HPC cluster today. Some cluster installations today are running upwards of 20,000,000 watts (20MW) of power to solve large HPC applications. Power has now taken center-stage as a key challenge we need to address in order to scale a cluster to new levels of high performance. The chapter author,  Claude J. … [Read more...]

Intel To Reveal More About HPC Communications Fabric Costs And Choices

October 21, 2014 by Rob Farber Leave a Comment

Register to attend the Oct 28 2014 free webinar by Joe Yaworski (Director of HPC Fabrics at Intel) and Phil Pokorny (CTO at Penguin)  titled, “Enhancing HPC Performance and Investment Through Optimized Fabrics". Intel’s thinking about network infrastructure will have a decided impact on the future of HPC given their recent wins on the NNSA (National Nuclear Safety Agency) 42 … [Read more...]

Heterogeneous Computing with MPI On Intel Xeon Phi

October 21, 2014 by Rob Farber Leave a Comment

The chapter authors discuss the hardware heterogeneity found in modern clusters and then analyze a  typical Intel Xeon Phi coprocessor accelerated node on the Stampede cluster at TACC, with an eye towards how MPI is used in similar clusters, and the positioning an MPI task within the node. The performance through different communication pathways is highlighted using micro … [Read more...]

Intel Reports 3Q14 Record Quarterly Revenue of $14.6 Billion

October 20, 2014 by Rob Farber Leave a Comment

Intel Corporation today reported third-quarter revenue of $14.6 billion, operating income of $4.5 billion, net income of $3.3 billion and EPS of $0.66. The company generated approximately $5.7 billion in cash from operations, paid dividends of $1.1 billion, and used $4.2 billion to repurchase 122 million shares of stock. "We are pleased by the progress the company is making," … [Read more...]

Remote Teaching Rooms Available At SC14

October 20, 2014 by Rob Farber Leave a Comment

Faculty members who plan to attend the SC14 conference will have access to two dedicated rooms for remotely teaching their courses. The two facilities are rooms 256 and 257 in the convention center in New Orleans. The rooms will be available from 8 a.m. to 5 p.m. Tuesday, Nov. 18 through Thursday, Nov. 20 (Central Standard Time). Faculty who want to use the … [Read more...]

Concurrent Kernel Offloading On Intel Xeon Phi

October 20, 2014 by Rob Farber Leave a Comment

Chapter 12 of High Performance Parallelism Pearls discusses optimizing performance when offloading concurrent kernels (e.g. task-parallelism) to the Intel Xeon Phi coprocessor. The authors state, "Our ultimate optimization target in this chapter is to improve the computational throughput of multiple small-scale workloads on the Intel Xeon Phi coprocessor by concurrent kernel … [Read more...]

Augmented Reality Company Magic Leap Bought by Google for $500M

October 18, 2014 by Rob Farber Leave a Comment

The reports are that the highly secretive augmented reality company Magic Leap has been acquired by Google for $500M. The acquisition of Magic Leap signals the chocolate factory wishes to become the Hersey's chocolatier for the augmented reality industry and demonstrates the demand for augmented reality applications. TechEnablement is observing a movement towards … [Read more...]

Dynamic Load Balancing using OpenMP 4.0

October 17, 2014 by Rob Farber Leave a Comment

Gilles Civario and Michael Lysaght from ICHEC show how to take advantage of the OpenMP 4.0 standard on Xeon and Intel Xeon Phi coprocessors to portably and efficiently maximize an N-body kernel on the entire available hardware. The chapter authors point out that the sample code can be used as a template applicable for countless of real live codes. By adapting this template to … [Read more...]

Free Colfax Intensive Intel Xeon Phi Training Slides

October 16, 2014 by Rob Farber Leave a Comment

Colfax International is making the 280 page slide deck  by Andrey Vladimirov  and Vadim Karpusenko titled "Parallel Programming and Optimization with Intel Xeon Phi Coprocessors" available free to those who wish to register at this URL. This training is an intensive course for developers wishing to leverage the Intel MIC architecture. and increase their knowledge of multi-core … [Read more...]

OpenCL Included! Intel Integrated Native Developer Experience

October 16, 2014 by Rob Farber Leave a Comment

Intel just released INDE. the Intel® Integrated Native Developer Experience cross-platform development suite that is claimed to provide a complete, consistent set of C++ and Java tools, libraries, and samples for environment setup, code creation, compilation, debugging, and analysis on Intel® architecture-based devices and select capabilities on ARM-based Android devices. The … [Read more...]

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