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You are here: Home / Archives for Rob Farber

Performance Optimization Of Black-Scholes Pricing On Intel Xeon Phi

October 29, 2014 by Rob Farber Leave a Comment

Who would have thought that a mere two hundred lines of code provide so many capabilities! The chapter authors (Iosif Meyerov, Alexander Sysoyev, Nikita Astafiev, and Ilya Burylov) apply their optimization expertise for Intel Xeon and Intel Xeon Phi to calculate the fair prices of a set of European options. They chose this the Black-Scholes calculation for the following … [Read more...]

Efficient Nested Parallelism On Large Scale Systems

October 28, 2014 by Rob Farber Leave a Comment

Choosing right threading library is critical for application performance, as different threading libraries provide significantly different performance behavior, especially when dealing with the complex computer systems as Intel Xeon Phi coprocessor and NUMA Intel Xeon processor machines. Unfortunately, choosing the right threading library is not enough, addition application … [Read more...]

Nov. 10 Live and Webcast Hands-On Intel Xeon Phi Training

October 27, 2014 by Rob Farber Leave a Comment

On Monday, November 10, 2014 from 9 AM to 4:30 PM EST Xsede and TACC will present a live AND webcast training event regarding using the Intel Xeon Phis on both the Beacon machine at NICS and the Stampede machine at TACC.  There is no charge for registration, but there are only 16 seats for the live training and 25 75 participants allowed into the zoom webcast. The training will … [Read more...]

Free Online OpenCL FPGA Development Courses By Altera

October 27, 2014 by Rob Farber Leave a Comment

Altera has released a new training course to teach OpenCL programmers how to develop code for FPGAs, "Building Custom Platforms for Altera SDK for OpenCL". This online training will go over all of the necessary steps to create a custom platform compatible with the Altera SDK for OpenCL. Altera recommends completing the following courses: Introduction to Parallel … [Read more...]

Teams Announced for SC14 Charity Parallel Computing Challenge

October 27, 2014 by Rob Farber Leave a Comment

Intel announced today the competition schedule and the final selection of teams who will participate in the second annual Intel Parallel Universe Computing Challenge (PUCC) at SC14 in New Orleans, November 17-20. Each team will play for a charitable organization to whom Intel will donate $26,000 in recognition of the 26th anniversary of the Supercomputing conference. The 2014 … [Read more...]

NWChem Quantum Chemistry Simulations at Scale

October 27, 2014 by Rob Farber Leave a Comment

This chapter describes the performance of NWChem's CCSD(T) method running on a large-scale hybrid cluster of 460 dual-socket Xeon E5-2600 series nodes each of which is equipped with two Intel Xeon Phi 5110P coprocessor cards (a total of 62.5k hybrid cores). The chapter authors describe how, without any low-level programming, offload transfers and compute kernels have been … [Read more...]

Author Call for Volume 2 Of High Performance Parallelism Pearls

October 24, 2014 by Rob Farber Leave a Comment

James Reinders and Jim Jeffers have opened up proposal submissions for another Intel Xeon and Intel Xeon Phi Pearls book tentatively titled, High Performance Parallelism Pearls – Multicore and Many-core Programming Approaches! It is expected that the submission deadline will be March 7, 2015. Proposal submission can be made here. Don't miss this opportunity to contribute … [Read more...]

The MSI WS60 As A Mobile Workstation Teaching Tool

October 24, 2014 by Rob Farber Leave a Comment

After nearly a month of utilizing the MSI WS60 Mobile Workstation  I have to admit I am spoiled by the speed and balance of this system. The clear IPS display is a pleasure to use when mobile and I love the color images on my Dell U3011 screen, courtesy of the NVIDIA K2100M GPU plus the Optimus technology preserves battery life. Speed The following animated gif (repeated 10 … [Read more...]

Native File Systems on Intel Xeon Phi

October 24, 2014 by Rob Farber Leave a Comment

A teraflop/s computational capability is useless without data. The Intel Xeon Phi family supports a number of file systems including Lustre, NFS, Fraunhofer BeeGFS® (formerly FHGFS), and the Panasas® PanFS® file system. The chapter author, Michael Hebenstreit, also discusses the importance of a correct network setup. He notes in his chapter summary (courtesy Morgan … [Read more...]

Integrating Intel Xeon Phi Coprocessors into a Cluster Environment

October 23, 2014 by Rob Farber Leave a Comment

The chapter authors build on the standard Intel MPSS documentation that provides the information required for workstation installs, but does not provide techniques needed for successful deployment in a cluster environment. Based on multiple authors' many years of experience managing HPC clusters and specific experience with the Intel Xeon Phi coprocessor family since the … [Read more...]

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