On Monday, November 10, 2014 from 9 AM to 4:30 PM EST Xsede and TACC will present a live AND webcast training event regarding using the Intel Xeon Phis on both the Beacon machine at NICS and the Stampede machine at TACC. There is no charge for registration, but there are only 16 seats for the live training and 25 75 participants allowed into the zoom webcast. The training will cover basic paradigms for using the MIC architecture as well as MPI, OpenMP 4.0, and vectorization. Hands-on activities are included. Register via the XSEDE user portal or RSVP directly to Ryan-Hulguin@tennessee.edu.
Don’t forget that about the Nov. 16 SC14 tutorial, “From ‘Hello World’ to Exascale Using x86, GPUs and Intel Xeon Phi Coprocessors” (tut106s1).
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