Intel announced today the competition schedule and the final selection of teams who will participate in the second annual Intel Parallel Universe Computing Challenge (PUCC) at SC14 in New Orleans, November 17-20. Each team will play for a charitable organization to whom Intel will donate $26,000 in recognition of the 26th anniversary of the Supercomputing conference. The 2014 … [Read more...]
NWChem Quantum Chemistry Simulations at Scale
This chapter describes the performance of NWChem's CCSD(T) method running on a large-scale hybrid cluster of 460 dual-socket Xeon E5-2600 series nodes each of which is equipped with two Intel Xeon Phi 5110P coprocessor cards (a total of 62.5k hybrid cores). The chapter authors describe how, without any low-level programming, offload transfers and compute kernels have been … [Read more...]
The MSI WS60 As A Mobile Workstation Teaching Tool
After nearly a month of utilizing the MSI WS60 Mobile Workstation I have to admit I am spoiled by the speed and balance of this system. The clear IPS display is a pleasure to use when mobile and I love the color images on my Dell U3011 screen, courtesy of the NVIDIA K2100M GPU plus the Optimus technology preserves battery life. Speed The following animated gif (repeated 10 … [Read more...]
Native File Systems on Intel Xeon Phi
A teraflop/s computational capability is useless without data. The Intel Xeon Phi family supports a number of file systems including Lustre, NFS, Fraunhofer BeeGFS® (formerly FHGFS), and the Panasas® PanFS® file system. The chapter author, Michael Hebenstreit, also discusses the importance of a correct network setup. He notes in his chapter summary (courtesy Morgan … [Read more...]
Integrating Intel Xeon Phi Coprocessors into a Cluster Environment
The chapter authors build on the standard Intel MPSS documentation that provides the information required for workstation installs, but does not provide techniques needed for successful deployment in a cluster environment. Based on multiple authors' many years of experience managing HPC clusters and specific experience with the Intel Xeon Phi coprocessor family since the … [Read more...]
Intel To Reveal More About HPC Communications Fabric Costs And Choices
Register to attend the Oct 28 2014 free webinar by Joe Yaworski (Director of HPC Fabrics at Intel) and Phil Pokorny (CTO at Penguin) titled, “Enhancing HPC Performance and Investment Through Optimized Fabrics". Intel’s thinking about network infrastructure will have a decided impact on the future of HPC given their recent wins on the NNSA (National Nuclear Safety Agency) 42 … [Read more...]
Heterogeneous Computing with MPI On Intel Xeon Phi
The chapter authors discuss the hardware heterogeneity found in modern clusters and then analyze a typical Intel Xeon Phi coprocessor accelerated node on the Stampede cluster at TACC, with an eye towards how MPI is used in similar clusters, and the positioning an MPI task within the node. The performance through different communication pathways is highlighted using micro … [Read more...]
Intel Reports 3Q14 Record Quarterly Revenue of $14.6 Billion
Intel Corporation today reported third-quarter revenue of $14.6 billion, operating income of $4.5 billion, net income of $3.3 billion and EPS of $0.66. The company generated approximately $5.7 billion in cash from operations, paid dividends of $1.1 billion, and used $4.2 billion to repurchase 122 million shares of stock. "We are pleased by the progress the company is making," … [Read more...]
Remote Teaching Rooms Available At SC14
Faculty members who plan to attend the SC14 conference will have access to two dedicated rooms for remotely teaching their courses. The two facilities are rooms 256 and 257 in the convention center in New Orleans. The rooms will be available from 8 a.m. to 5 p.m. Tuesday, Nov. 18 through Thursday, Nov. 20 (Central Standard Time). Faculty who want to use the … [Read more...]
Concurrent Kernel Offloading On Intel Xeon Phi
Chapter 12 of High Performance Parallelism Pearls discusses optimizing performance when offloading concurrent kernels (e.g. task-parallelism) to the Intel Xeon Phi coprocessor. The authors state, "Our ultimate optimization target in this chapter is to improve the computational throughput of multiple small-scale workloads on the Intel Xeon Phi coprocessor by concurrent kernel … [Read more...]