Where: Texas Advanced Computing Center, J.J. Pickle Research Campus, ROC Building 196, 10100 Burnet Road Austin, TX 78758
When: Tuesday, April 22, 2014, 8:30 AM – 4:00 PM
This one-day training will provide software developers the foundation needed for modernizing their code to take advantage of parallel architectures found in both the Intel® Xeon® processor and the Intel® Xeon Phi™ coprocessor.
The session will cover an overview of parallel programming frameworks and optimization guidelines for multi-core CPUs (Intel® Xeon®) and many-core coprocessors (Intel® Xeon Phi™):
Discussions about three layers of parallelism: SIMD, Threads, Cluster environment Tips for quick porting/development of HPC software applications Real-life examples of code and optimization techniques Hardware solution and corresponding software implementations, APIs, and framework Click here to RSVP and learn more.
Please submit any questions that you may have via the TACC Consulting System.
http://portal.tacc.utexas.edu/consulting/
Leave a Reply