Power has become the limiting factor today on how far we can scale an HPC cluster today. Some cluster installations today are running upwards of 20,000,000 watts (20MW) of power to solve large HPC applications. Power has now taken center-stage as a key challenge we need to address in order to scale a cluster to new levels of high performance.
The chapter author, Claude J. Wright, presents a methodology to measure power and temperature in order to understand how Intel Xeon Phi Coprocessors impact the overall cluster power envelope. Since a typical Intel Xeon Phi cluster should offload many of the most intensive computations onto the coprocessor, this is potentially where a large percentage of the total cluster power will be consumed. This chapter demonstrates how to create a simple software-based power analyzer using scripts with the standard Intel® Manycore Platform Software Stack (Intel® MPSS) tools that ship with the coprocessor.
In addition, some non-intrusive hardware-based power analysis techniques are discussed that can be used to gather power data at the compute node and the data center rack level using industry standard tools such as Intelligent Platform Management Interface (IPMI) and smart Power Distribution Units (PDUs). These techniques allow a software developer to build a power budget into their software, and then measure the actual power consumption while still tuning the HPC workload. The power analysis tools can also characterize different workloads based on power consumption in the rack or data center, which can help to avoid concurrently scheduling high power applications, and to provide guidance to users as well as guide a facilities engineer who may want to know more detailed information about the power consumption of a server than the information provided on the simple data plate on the back of the box.
Claude Wright is an Engineer at Intel working on Power Analysis and Green 500 tuning for systems using the Intel Xeon Phi coprocessor. Prior to joining Intel in 2008, Claude worked on the original XBOX GPU validation at NVIDIA and also the original LaserWriter family of laser printers from Apple Computer.
Click to see the overview article “Teaching The World About Intel Xeon Phi” that contains a list of TechEnablement links about why each chapter is considered a “Parallelism Pearl” plus information about James Reinders and Jim Jeffers, the editors of High Performance Parallelism Pearls.