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Horst Simon Explains the HPC Slowdown (and Human Brain Scale Simulation)

February 14, 2015 by Rob Farber Leave a Comment

HPC luminary Horst Simon, the Berkeley Lab Deputy Director, gave a marvelous talk at an HPC meetup event in San Francisco on Feb 10 covering power efficiency and the movement towards exascale computing. Horst presented data and the conclusion that the June 2008 - June 2013 five-year span marks a turning point where the growth attributed to Moore’s law and parallelism are … [Read more...]

Tutorial on the OpenCL 2.0 Generic Address Space

February 11, 2015 by Rob Farber Leave a Comment

Adam Lake and  Robert Ioffe posted a nice tutorial on the Intel website about the new OpenCL 2.0 generic address space. The OpenCL 2.0 generic address space makes writing OpenCL programs easier by removing the requirement of decorating all pointers with a points to address space. Instead, OpenCL programmers just use pointers as they would in standard C. Utilizing this new … [Read more...]

First 2015 Issues of IEEE Magazines Free to View

February 10, 2015 by Rob Farber Leave a Comment

For a limited time, everyone can view the digital edition of the first issue of all the IEEE Computer Society CS magazines free, directly from their homepages found at this link. These are peer-reviewed, topical magazines that represent the current research, developments, and timely information, that are also edited to enhance readability and clarity. The IEEE Computer … [Read more...]

Power Profiling Shows Simple Changes To Save Megawatts of Power On Leadership Supercomputers

February 10, 2015 by Rob Farber Leave a Comment

A challenge with profiling applications lies in how to interpret the profile results. In particular, most programmers do not give the power profile plots more than a cursory glance. Following is an example waterfall plot showing the power utilization for an NWChem run on Intel Xeon Phi coprocessors: My recent column in Scientific Computing, "Using Profile Information for … [Read more...]

Preparing For Knights Landing – Stay in HBM Memory

February 9, 2015 by Rob Farber Leave a Comment

NERSC published an informative preparatory article for programming the forthcoming Cori supercomputer that notes each Intel Xeon Phi “Knight’s Landing” (KNL) devices will be running in a “self-hosted” mode, meaning that there will be no host/traditional processor. Everything - including the operating system - will run on KNL. This eliminates concerns about data movement as … [Read more...]

Intel Posts OpenCL 2.0 QuickSort Tutorial (Compare to TE CUDA Version)

February 5, 2015 by Rob Farber Leave a Comment

Intel Engineer Robert Ioffe has posted an OpenCL QuickSort tutorial that utilizes nested parallelism and Workgroup-scan functions. In particular, the tutorial shows how to use the OpenCL™ 2.0 enqueue_kernel functions that queue kernels from the device without host intervention (Much like dynamic parallelism) plus work_group_scan_exclusive_add  and … [Read more...]

2015 HPC Advisory Council Presentations Available Online

February 3, 2015 by Rob Farber Leave a Comment

The presentation slides from the 2015 HPC Advisory Council held at Stanford are now available for all to view on the Internet. InsideHPC is bringing videos of the presentations online as well. http://youtu.be/nhF9Wc9_RQY   … [Read more...]

MAGMA LU Decompositions, Factorizations, and Eigensolvers for Intel Xeon Phi Coprocessors Released

February 2, 2015 by Rob Farber Leave a Comment

MAGMA MIC 1.3.1  now provides implementations for MAGMA's one-sided (LU, QR, and Cholesky) and two-sided (Hessenberg, bi- and tridiagonal reductions) dense matrix factorizations, as well as linear and eigenproblem solver for Intel Xeon Phi Coprocessors. The MAGMA MIC 1.3.1 release adds Added orthogonal transformations … [Read more...]

Fine-Tuning Vectorization and Memory Traffic on Intel Xeon Phi Coprocessors

February 2, 2015 by Rob Farber Leave a Comment

Andrey Vladimirov at ColFax International has posted source code and a paper, "Fine-Tuning Vectorization and Memory Traffic on Intel Xeon Phi Coprocessors: LU Decomposition of Small Matrices" on the ColFax site. Andrey notes, "Benchmarks show that the discussed optimizations improve the application performance on the coprocessor by a factor of 2.8 compared to the unoptimized … [Read more...]

Attend or Submit to the 3rd IWOCL May 12-13, 2015 at Stanford University

January 30, 2015 by Rob Farber Leave a Comment

The 3rd IWOCL (International Workshop on OpenCL) takes place at Stanford University, California from Tuesday 12 to Wednesday 13 May 2015.  Workshops are held on the Tuesday, followed by the one-day conference on Wednesday.  The conference is accompanied by a poster session and table-top displays by sponsors. OpenCL Papers, Workshops and Posters The IWOCL 2015 call for … [Read more...]

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