SPARC64 1 TF/s DP, 2 TF/s SP With 32 Cores And Stacked Memory

Described as part of Fujitsu’s path to exascale, the new Fujitsu SPARC64 enters an enterprise (and HPC) market ripe with ARM64 products quickly coming to market and Intel aggressively working to preserve market share with products such as Intel Xeon Phi and FPGAs stacked on-top of a CPU package. The SPARC64 product looks nice (see infographic below), but key information about power consumption is unavailable, which makes calculation of the key ops/watt and flops/watt metrics impossible. The hope is that the RISC architecture of the SPARC processor can be optimized for both performance and power consumption. The water cooled rack in the infograph contains 600 of the SPARC64 jewels along with Micron HMC chips tells us about heavy density. However, we do not know if the density is due to entirely to water cooling or important features of the SPARC64 chips. Pricing has also not been specified.